Abstract

The integrated circuit (IC) fabrication technology continues to push the limits of microelectronics packaging technologies. Today millions of transistors can be fabricated in a chip of about 1 cm × 1 cm in size, and the required I/O density is about 1600/cm2. Although tremendous advances have been made in die to substrate interconnect technologies as well as substrate/PWB technologies, these advances have not kept pace with advances in semiconductor technology, and therefore, continue to be a bottleneck for further advances in semiconductor technologies. In addition to fabrication constraints, low cost and reliability are other requirements that affect interconnect development. Wafer-level Packaging (WLP) is an effective solution to address some of these issues. A compliant interconnect, called “J-Spring”, has been proposed and developed at Georgia Institute of Technology. Although based on the same concept of inherent stress-gradient used in the linear spring, the J-Spring will provide greater in-plane compliance. These compliant interconnects can be fabricated in batch at wafer level and the pitch can be as low as 30 μm. The fine pitch can meet and exceed the requirements of International Technology Roadmap for Semiconductor (ITRS) for 2011 [ITRS, 2001] and beyond. J-Springs with different radius, angle, width, and release length have been fabricated on a test wafer. Numerical model has been created to determine the release height based on J-Spring geometry and stress gradients. Also, the compliance of J-Spring has been determined in three orthogonal directions using parametric numerical models. The compliance of J-Spring is compared with the compliance of the linear spring. The proposed compliant interconnects can accommodate the differential displacement due to CTE mismatch between the die and the substrate. In addition, to their mechanical characteristics, their electrical characteristics have been studied as well. The electrical characteristics are dependent on the geometry, dimensions and the materials used.

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