Measuring Processor Frequency for Load Stability in Multi-Core MIMD Architecture

Abstract

Parallelism, a massive achievement in the field of processor architecture leading towards increased speed up by incorporating data as well as computation intensive work. Parallel architectural components interconnected with major consideration as communication among coupled hardware in order to stabilize workload distribution and management. Workload distribution with load stability fundamentally a tricky aspect of parallel distribution. Static policies covers load factors which are pre-determined before actually distribution takes place. Dynamic load stability and distribution periodically measures the load for each and every processor in heterogenic parallel processor systems.. Development of heterogenic multiprocessor machines with dynamic load stability matrices or measurements incorporates vast amount of efforts and covers varied amount of configuration factors on the behalf of the underlying communication architecture. So much of the processor’s efforts may lose for load stabilization, which may be controlled by improved dynamic load stability techniques and theories. In this research, the major aspect of development is to measure processor efficiency by analyzing frequency speed along with current processor load, only then the distribution takes place. Measuring cycle speed (i.e. no. of cycle per second elapsed) in terms of Hz, Mhz, Ghz is one of the measurement metric to analyze the processor efficiency. Further the research covers MIMD based core processor simulation version integrate frequency based distribution for load steadiness and control. Although, load consistency will not be completely managed with in any type of system. Load steadiness and uniformity will only be controlled up to some extent. General Terms Dynamic Job scheduling, Load Balancing and consistency, Processor Efficiency, Multi-Core MIMD Systems, Cycle Speed.