Measurements of carrier diffusion length in processed wafers: correlation with the electrical behaviour

Abstract

Abstract A comparison between diffusion length measurements and electrical data is presented. Electrically defective junctions have been analyzed in detail. After complete electrical characterization, diffusion length maps of typical and defective wafers have been obtained from Elymat measurements. Some elaboration is necessary in order to identify the contributions to diffusion length reduction due to metal contamination, and to separate them from the effect of oxygen precipitation. This separation is possible if a region relatively free from contamination can be identified. In this case, a good correlation is observed between elaborated diffusion length data and electrical measurements. It is shown how these data can be used to identify the process step responsible for the contamination. The impact on carrier diffusion length of a rapid thermal anneal (RTA) at the end of a device process has been studied. Diffusion length maps of furnace annealed wafers and RTA wafers exhibit distinct patterns. A comparison of these maps suggests that previously gettered metal impurities are redistributed by the RTA step. Electrical data of the junction reverse current support this interpretation, indicating that a process with a final RTA step is much more critical from the point of view of metal contamination than a process using only furnace annealing treatments.