Measurement and Analysis for Time Jitter of Reversely Switched Dynistor

Abstract

To evaluate the application prospects of reversely switched dynistor (RSD) in high-power microwave system, time jitters of RSD were measured, and some factors affecting the time jitter were also discussed. Helping to reduce errors in the results, a way of measuring time jitter of RSD was proposed for the first time in this article. Experiments were carried out, in which dc voltage (main voltage) varied from 300 to 700 V and the energy storage capacitor (C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0</sub> ) in the test circuit varied from 2 to 5 μF. Experimental results showed that the time jitter was in the range of 0.57-1.57 ns and changed irregularly with the increase of C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0</sub> but tended to increase with the decrease of main voltage. For the relationship between the time jitter and C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0</sub> , the changing trend of fluctuation of current in RSD is the same as the changing trend of fluctuation of the RSD turn-on delay time and is almost not affected by C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0</sub> , which indicates C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0</sub> has little influence on time jitter of RSD. For the relationship between the time jitter and the main voltage, the decrease of main voltage leads to higher voltage fluctuation of RSD and longer RSD turn-on delay time, which together result in higher fluctuation of current in RSD. Consequently, we believed that the decrease of the main voltage leads to an increase of the time jitter.