Maximum Likelihood Estimation of Clock Skew in IEEE 1588 with Fractional Gaussian Noise

Abstract

To support system-wide synchronization accuracy and precision in the sub-microsecond range without using GPS technique, the precise time protocol (PTP) standard IEEE-1588 v2 is chosen. Recently, a new clock skew estimation technique was proposed for the slave based on a dual slave clock method that assumes that the packet delay variation (PDV) in the Ethernet network is a constant delay. However, papers dealing with the Ethernet network have shown that this PDV is a long range dependency (LRD) process which may be modeled as a fractional Gaussian noise (fGn) with Hurst exponent (H) in the range of0.5<H<1. In this paper, we propose a new clock skew estimator based on the maximum likelihood (ML) technique and derive an approximated expression for the Cramer-Rao lower bound (CRLB) both valid for the case where the PDV is modeled as fGn (0.5<H<1). Simulation results indicate that our new clock skew method outperforms the dual slave clock approach and that the simulated mean square error (MSE) obtained by our new proposed clock skew estimator approaches asymptotically the developed CRLB.