Abstract

Negative Bias Temperature Instability (NBTI) is studied in Silicon Oxynitride (SiON) p-MOSFETs using a recently developed Ultra-Fast On-The-Fly linear drain current method. It is shown that both stress and recovery phases of NBTI are strongly influenced by SiON gate insulator process. Gate insulator nitrogen spatial distribution is shown to impact interface trap generation (NIT) and hole trapping (Nh) components of overall threshold voltage shift (VT). A simple, self consistent method is proposed to isolate NIT and Nh. It is shown that the time dynamics of stress and recovery phases are strongly correlated, at short time governed by trapping and detrapping of holes, and at long time by generation and passivation of interface traps.

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