Abstract
Phase-locked loop (PLL) is a technique which has contributed significantly toward the technology advancement in communication. Phase and frequency synchronization problems have been present in electronic engineering since the first coherent modulation systems were developed. This paper gives basic details of PLL. It provides brief summary of the basic PLL principle applicable to control systems and digital communication. It also reports components of PLL and comparison among them. PLLs are responsible for recovering the correct time basis and synchronizing the processes. According to the application needs, different clock distribution strategies were developed, with the master-slave being the simplest and most used choice. PLL techniques is chosen for synchronization, since it is one of the most active synchronization techniques. This article contains Simulink of the MATLAB, simulation method and circuit design and mathematical solutions to synchronize PLL.
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