Abstract
This paper addresses the problem of mapping the modules of a task precedence graph to the processing elements of a parallel computer. The goal of the mapping is to minimize the total execution time of the task, sum of the computation and communications time, within a processor network of limited size. We consider the special instance where the precedence graph is a binary precedence tree. We present a linear time procedure for mapping an almost full binary precedence tree of n nodes to any p processor hypercube, with unit dilation cost and optimal execution time. The computation time under the mapping is seen to be O ( n/p ) and the communications time is seen to be log p.
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