Abstract
Passives account for a very large part of today's electronic assemblies. This is particularly true for digital products such as cellular phones, camcorders, computers and several critical defense devices. This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on organic multilayered substrates. A variety of thin film capacitor and resistors were utilized to manufacture high-performance embedded passives. The electrical properties of capacitors fabricated from polymer-ceramic nanocomposites showed a stable capacitance and low loss over a wide temperature range. We have designed and fabricated several printed wiring board (PWB) and flip-chip package test vehicles focusing on resistors and capacitors. Two basic capacitor cores were used for this study. One is a layer capacitor. The second capacitor in this case study was discrete capacitor. In both cases, capacitance values are defined by the feature size, thickness and dielectric constant of the polymer-ceramic compositions. Nanocomposite can be directly deposited either by liquid coating or screen printing. Alternatively, nanocomposite thin films can be laminated and capacitor laminate can be used as the base substrate for subsequent build-up processing. For example, Resin Coated Copper Capacitive (RC3) nanocomposites were used to fabricate 35 mm substrates with a two by two array of 15mm square isolated epoxy based regions; each having two to six RC3 based embedded capacitance layers. The capacitor fabrication is based on a sequential build-up technology employing a first patternable electrode. After patterning of the electrode, RC3 nanocomposite can be laminated within PCB. Embedded passive cores are showing high capacitance density ranging from 15 nF to 30nF depending on Cu area, composition and thickness of the capacitors. Reliability of the capacitors was ascertained by IR-reflow, thermal cycling, PCT (Pressure Cooker Test ) and solder shock. Embedded capacitors were stable after PCT and solder shock. Capacitance change was less than 5% after IR reflow (assembly) preconditioning (3X, 245 °C) and 1000 cycles DTC (Deep Thermal Cycle).
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More From: Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT)
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