Abstract

Radiation hard silicon sensors are required for the upgrade of the ATLAS tracking detector for the High-Luminosity Large Hadron Collider (HL-LHC) at CERN. A process modification in a standard 0.18 µm CMOS imaging technology combines small, low-capacitance electrodes (~2 fF for the sensor) with a fully depleted active sensor volume. This results in a radiation hardness promising to meet the requirements of the ATLAS ITk outer pixel layers (1.5×1015 n eq /cm2 ), and allows to achieve a high signal-to-noise ratio and fast signal response, as required by the HL-LHC 25 ns bunch crossing structure.The radiation hardness of the charge collection to Non-Ionizing Energy Loss (NIEL) has been previously characterised on prototypes for different pixel sensor cell designs. The encouraging results enabled the design of full-size monolithic CMOS sensors for the ATLAS ITk outermost pixel layer, which comprises ∼1.8 m2 of pixel sensor active area. In the MALTA sensor, we implement a fast, low-power analogue front-end together with a novel high-speed matrix readout architecture capable of meeting the challenging hit-rate requirements of up to 2 MHz/mm2 in the outer layers of the ITk pixel tracker. The front-end was optimized for the low sensor capacitance to achieve low noise (ENC < 20 e-) and low power operation (< 1 µW/pixel), with timing that meets the 25 ns requirement. The small size (∼2 µm) of the collection electrode also allows better shielding to prevent crosstalk from the full swing digital signals in the 36.4×36.4 µm2 pixel. MALTA features a 512 × 512 pixel matrix with a fully asynchronous readout architecture, without clock distribution over the matrix. This approach combines low digital power consumption with fast signal response and high hit-rate capability.This paper describes the implementation of this novel depleted monolithic sensor based on a low-capacitance analogue design with asynchronous readout, together with first test results from lab tests, radioactive source tests and X-ray measurements.

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