Abstract

Spin-based devices can reduce energy leakage and thus increase energy efficiency. They have been seen as an approach to overcoming the constraints of CMOS downscaling, specifically, the Magnetic Tunnel Junction (MTJ) which has been the focus of much research in recent years. Its nonvolatility, scalability and low power consumption are highly attractive when applied in several components. This paper aims at providing a survey of a selection of MTJ applications such as memory and analog to digital converter, among others.

Highlights

  • The discovery of Giant Magnetoresistance (GMR) [1,2] led to the development of spintronics [3].Studies in this area have resulted in several important advances

  • While the spin-based Look-up Table (LUT) presented in References [53,54,55,56,57] require a clock, in Reference [52], a 6-input fracturable non-volatile Clockless LUT (C-LUT) using a spin Hall effect (SHE)-based Magnetic Tunnel Junction (MTJ) is proposed for combinational logic operations without needing a clock

  • The characteristics of MTJs make this type of device suitable in various areas

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Summary

Introduction

The discovery of Giant Magnetoresistance (GMR) [1,2] led to the development of spintronics [3]. Using the same path can lead to unexpected writing when reading is in progress Another disadvantage of the STT is that the current required to switch the states of the MTJ is not symmetrical (going from P to AP requires a bigger current than going from AP to P). Where ξ is the VCMA coefficient to weigh the perpendicular magnetic anisotropy (PMA) change under Vb , ∆(0) is the thermal stability under zero voltage, A is the sectional area of the MTJ, T is the temperature, tox is the MTJ oxide layer thickness and k B is the Boltzmann constant. Compared to STT, VCMA does not require large currents facilitating the scalability of its applications and resulting in a lower power consumption. One disadvantage of SOT is that it requires bigger cell size than STT-based applications due to its three terminal structure, so it can be not compatible with high-density applications

Memory
Logic Gates
Design
Comparator
Non-Uniform Clock Generator
Sensors
Conclusions
Full Text
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