Abstract

Modeling and evaluating nonfunctional properties such as performance, power, and reliability of embedded systems are tasks of utmost importance. In this article, we introduce M AESTRO , a methodology for the modeling and evaluation of nonfunctional properties and embedded firmware of MPSoC architecture components at the Electronic System Level (ESL). In contrast to existing design flows that provide predefined performance models, M AESTRO defines a flexible approach that allows to define virtual prototypes that can be easily customized and extended to evaluate multiple nonfunctional properties of interest at different levels of abstraction. In M AESTRO , a design is composed purely from actor-oriented models. This enables typical ESL features such as automatic design space exploration and synthesizability of HW and SW components, typically missing in very general design flows. Unique to M AESTRO is the separation and coordination of the interaction between application functionality, firmware, and performance models for the evaluation of nonfunctional properties, and their complex interactions within a single Model-of-Computation (MoC). The main advantages of M AESTRO are: (I) Extensible modeling of interdependent nonfunctional properties of heterogeneous MPSoC components; (II) high flexibility to investigate the appropriate trade-off between modeling effort and accuracy of nonfunctional property evaluators; (III) a holistic approach for modeling application functionality as well as firmware affecting the evaluation of nonfunctional properties. Regarding (II), we present a mobile baseband processor platform use-case, executing a GSM paging application. To demonstrate (I) and (III), we present the modeling of a complex ESL processor virtual prototype, running a soft real-time application and equipped with both a power and reliability manager.

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