Abstract

Because the reliability of semiconductor packages is strongly dependent upon the package operating temperature, the thermal behavior of these packages is a significant factor in determining the mean time between failures. As a result, the package thermal resistance is of great interest to design and development engineers. The internal thermal resistance of a typical dual-in-line (DIP) semiconductor device can be divided into two components: the microscopic resistance (that resistance caused by the imperfect contact between the internal surfaces) and the macroscopic resistance (the resistance resulting from large geometric variations). The current investigation focuses on the macroscopic resistance, which is typically the larger of the two resistances occurring in a package. In order to determine the macroscopic construction resistance occurring in a representative microelectronic package, a combined numerical and experimental investigation was conducted. The constriction resistance was determined as a function of the geometric parameters, and an electrolytic analog technique was used to provide experimental data for comparison with the numerical model.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.