Machine Learning-based Pin Accessibility Prediction and Application

Abstract

Summary form only given, as follows. The complete presentation was not made available for publication as part of the conference proceedings. With the decrease of critical dimension and the increase of design complexity, pin accessibility has become one of the most critical factors causing design rule violations (DRVs) and determining routability. Machine learning-based DRV prediction techniques have been commonly adopted, where global routing (GR) congestion and local pin density are commonly used as the main features during the training process. Empirically, however, the DRVs in many designs of advanced nodes may not be strongly correlated with the two features. In this talk, two pin accessibility prediction models will be introduced that use pin patterns as the major training feature, which are respectively based on a specific design and a given set of libraries from foundry. Both the models can be integrated into a placement engine for design optimization.