Abstract

Machine learning, a powerful technique for building models, can rapidly provide accurate predictions. Since Integrated Circuit (IC) design and manufacturing have tremendously high complexity and enormous data, there is a surge in adapting machine learning approach in IC Design stages, as machine learning can provide fast predictions. Recently, machine learning has been used in some IC Design stages (e.g. Physical Verification), but not in Physical Design. In this research, machine learning is adapted to Physical Design. Surrogate Modeling is implemented to predict results after GR in Physical Design. Machine learning models for predicting Detailed Route (DR) results using Global Route (GR) results are also discussed. With surrogate models and machine learning methods, circuit performances after Physical Design (e.g. hold violation check and area) would be predicted quickly.

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