Abstract

Laser Voltage Image technique demonstrated over years its effectiveness in identifying the ICs failure root causes. In this paper two cases study are presented, all based on the use of LVI technique. The DUT analysed, implemented in BiCMOS technology, belongs to the Automotive market segment. Parallel Lapping technique have been used in order to characterize morphological marginalities and abnormalities. Results from this two cases should be good examples to prove how this kind of approach - fault isolation driven by LVI - is a powerful technique able to identify quickly and precisely failure root causes in high complexity ICs, characterized by intermittent scan chain integrity stabilized after PRBS defect activation, especially when APTG diagnosis does not highlight clear results.

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