<title>VLSI Architectures For Syntactic Image Analysis</title>

Abstract

VLSI architectures for syntactic image analysisY. P. ChiangDepartment of Electrical Engineering, Washington State University, Pullman, WA 99164K. S. FuSchool of Electrical Engineering, Purdue University, W. Lafayette, IN 47907AbstractEarley's algorithm has been comitnly used for the parsing of general context -free languages and error -correcting parsing in syntactic pattern recognition. The time complexity for parsing is 0(n3). In this paperwe present a parallel Earley's recognition algorithm in terms of x * operation. By restricting the inputcontext -free grammar to be X -free, we are able to implement this parallel algorithm on a triangular shapeVLSI array. This system has an efficient way of moving data to the right place at the right time. Simulationresults show that this system can recognize a string with length n in 2n +1 system time We also present anerror -correcting recognition algorithm. The parallel error -correcting recognition algorithm has also been im-plemented on a triangular VLSI array. This array recognizes an erroneous string length n in time 2n +1 andgives the correct error count. Applications of the proposed VLSI architectures to image analysis are illus-trated by examples.