Abstract
In past decades, many storage schemes for large images on parallel computers have been proposed to provide simultaneous access to various subsets of the pixels. The existing storage schemes have the following limitations: (1) The address generation mechanism is dependent on the size of the image to be processed. (2) Many schemes have limitations on the machine size and image size (N X N, such as N must be an even power of 2). (3) As more and more frequently used data patterns have been recognized, most schemes can only provide parallel access to a limited range of data patterns. (4) The data alignment (connecting each memory module to a proper processor) may require special hardware. In this study, we investigate the combination of several storage schemes. They mainly employ exclusive-or operations for address generation which can be completed in constant time. The address generation mechanism is independent of the image size so that different sized images can be processed efficiently on a fixed-size machine. The system uses N memory modules where N is any (even or odd) power of two. With schemes combined together, this system covers more data patterns than any single scheme yet proposed.
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