Abstract

Real-time optical processing is an area of increasing interest in several fields like pattern recognition and inspecting tasks. The development of Spatial Light Modulators (SLMs) capable to display a complex amplitude 2D- distribution in real-time has been very important to obtain real-time optical processors. One of the biggest challenges for improving these processors is to obtain SLMs with a pixel-by-pixel control, which could be easily implemented and fully controlled spatially and with grey-level addressing. Liquid Crystal Displays (LCDs) are inexpensive and suitable SLMs for recognition optical purposes. The LCD panels from the Epson VP100PS videoprojector have been deeply characterized and intensively used as SLMs in optical correlators for pattern recognition. The SLMs can be used in the filter plane as well as in the input plane. If the input image to analyze entails particular requirements in spatial resolution and grey level quantization the response features of the SLM used to display the input image can be critical. In this work we present a full pixel-by-pixel control of the matrix with a PC board. A Field Programmable Gate Array (FPGA) is designed to control a PC board as a prototype to implement a Very Large Scale Integration ASIC driver using the 2.5 microns technology available from the Centro National de Microelectronics (CNM-CSIC, Bellaterra, Spain). The project results in an inexpensive and easy- reconfigurable PC board with the FPGA prototype, and an easy migration to a fully integrated driver of the display.© (1996) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

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