<strong>Chip- and Module-Level Integration of an 8 Channel Silicon Photonics WDM system</strong>

Abstract

  Chip-level integration in Silicon Photonics (SiP) technology of complex optical communication systems, like WDM or PAM systems, is the key to both power and cost efficient implementation of next generation Datacom applications. Semiconductor Mode-Locked-Lasers (MLL) [1] and Resonant Ring Modulators (RRM) [2,3] are considered elegant building block solutions for an efficient transceiver architecture. We have recently demonstrated a single channel link with 14G and 25G On-Off-Keying (OOK) modulation based on a single section MLL and RRMs [4,5]. Here, we will report on the latest progress towards a fully integrated 8 channel WDM Datacom transceiver system. The system features a SiP-PIC with a hybrid integrated MLL, a wideband filter for line selection, and 8 channels of high speed RRMs on the Tx side, as well as an 8 channel OADM DeMUX, and Ge-integrated waveguide photodiodes as well as flip-chip photodiodes on the receiver side. Figure 1 shows a micrograph and a block diagram of the transceiver SiP-PIC before assembly. The SiP-PIC is assembled on a module PCB together with 8x 25G modulator drivers and 8x 25G transimpedance amplifiers (TIA) and packaged in a module housing. Figure 2 shows a test system assembly with an external MLL and SOA.