Abstract
A low leakage poly-Si thin film transistor (TFT) is proposed featuring hydrogenated amorphous silicon (a-Si:H) buffer layer and source/drain extension (SDE) by using technology computer aided design (TCAD) simulation. This architecture reduces off-current effectively by suppressing two leakage current generation mechanisms with little on-current loss. The amorphous silicon buffer layer having large bandgap energy (Eg) suppresses both thermal generation and minimum leakage current, which leads to higher on/off current ratio. In addition, the formation of lightly doped region near the drain alleviates the field-enhanced generation in the off-state by reducing electric field. TCAD simulation results show that the proposed TFT shows more than three orders of magnitude lower off-current than low-temperature polycrystalline silicon (LTPS) TFTs, while maintaining on-current.
Highlights
H.U.; Kim, Y.J.; Park, Y.G.; Choi, W.Y.A low-temperature polycrystalline silicon thin-film transistor (LTPS thin film transistor (TFT)) fabricated on a glass substrate has been considered as one of the most attractive options for activematrix organic light emitting diode (AMOLED) display applications because it has higher electron mobility and driving current than an amorphous-silicon (a-Si) TFT and oxideTFT [1,2,3,4,5,6,7]
One is the thermal generation depending on trap density, energy bandgap, and temperature while being independent of gate voltage (V G )
Several methods have already been proposed for lower leakage current and higher performance [18,19,20,21,22,23,24,25,26,27,28,29,30] including field-induced drain (FID) [28,29] and current and electric field split (CES) design TFTs [30]
Summary
H.U.; Kim, Y.J.; Park, Y.G.; Choi, W.Y. A low-temperature polycrystalline silicon thin-film transistor (LTPS TFT) fabricated on a glass substrate has been considered as one of the most attractive options for activematrix organic light emitting diode (AMOLED) display applications because it has higher electron mobility and driving current than an amorphous-silicon (a-Si) TFT and oxide. Several methods have already been proposed for lower leakage current and higher performance [18,19,20,21,22,23,24,25,26,27,28,29,30] including field-induced drain (FID) [28,29] and current and electric field split (CES) design TFTs [30]. We propose the LTPS TFTs using an amorphous silicon buffer layer and Electronics 2021, 10, 29 source/drain extension (SDE) which lowers leakage current by suppressing both thermal generation and field-enhanced generation in the off-state. The SDE reduces the electric field at the rent loss It is because the amorphous silicon layer is very thin (
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