Low-voltage low-power 100 MHz programmable gain amplifier in 0.35 μm CMOS

Abstract

This paper presents a low-voltage low-power intermediate-frequency programmable gain amplifier (PGA). To achieve low-voltage low-power and wideband operation while preserving linearity, the proposed cell is based on a very simple g m -boosted differential pair degenerated with a hybrid polysilicon-MOS programmable resistor structure. Fabricated in a 0.35 ?m CMOS technology, the PGA consumes less than 0.5 mW at a single 1.8 V supply. Measured results for a 3-bit implementation show a 0 to 18 dB linear-in-dB programmable gain with a constant bandwidth of 100 MHz when driving 150 fF capacitive loads. Distortion levels are below ?72 dB over the whole gain range at 10 MHz for a 0.2 V p ? p differential output. Compared with other previously reported designs, it shows a good trade-off when all PGA parameters are considered.