Abstract
This paper presents a new low-voltage floating gate MOS (FGMOS)-based current-mode squarer/divider circuit. The low-voltage operation is obtained by replacing the PMOS transistor used to bias the conventional circuit with two-input FGMOS. The proposed circuit offers advantage of two-quadrant operation, low supply voltage (0.85 V) requirement, low circuit complexity and low noise as compared to the conventional one. The proposed circuit is then used as basic building block to develop full Gaussian function generator and RMS-to-DC converter. The simulations are performed in TSMC 0.18 µm CMOS, BSIM3 and Level 49 technology by using Spectre simulator of Cadence.
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