Low-voltage CMOS four-quadrant multiplier

Abstract

A new CMOS four-quadrant multiplier that can operate from supply voltages of ±1.5 V is presented. This circuit was fabricated in a standard 0.8 µm single-poly double-metal CMOS process. Experimental results show that the nonlinearity can be kept <2% across the entire differential input voltage range of ±0.8 V. The total harmonic distortion is <2% with the differential input range up to ±0.8 V. The measured –3 dB bandwidth of this multiplier is ~5 MHz. It is expected to be useful in low-voltage analogue signal-processing applications.