Abstract

Pedestrian detection is one of the key problems in the emerging self-driving car industry. In addition, the Histogram of Gradients (HOG) algorithm proved to provide good accuracy for pedestrian detection. Many research works focused on accelerating HOG algorithm on FPGA (Field-Programmable Gate Array) due to its low-power and high-throughput characteristics. In this paper, we present an energy-efficient HOG-based implementation for pedestrian detection system on a low-cost FPGA system-on-chip platform. The hardware accelerator implements the HOG computation and the Support Vector Machine classifier, the rest of the algorithm is mapped to software in the embedded processor. The hardware runs at 50 Mhz (lower frequency than previous works), thus achieving the best pixels processed per clock and the lower power design.

Highlights

  • Pedestrian detection is a safety-critical application on autonomous cars

  • The Histogram of Gradients (HOG) algorithm consists of two main steps: gradient computation and histogram generation

  • Regarding FPGA resources, our design is optimized for memory and consumes the least memory resource except for the one in [9] which reports zero memory usage

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Summary

Introduction

Pedestrian detection is a safety-critical application on autonomous cars. There are two main approaches to implement pedestrian detection systems. The detection algorithm relies on all input image pixels. This approach uses deep learning method and it requires costly computing platforms with many processing cores and large memory bandwidth and capacity. Only extracted features from the image will input the detection algorithm This approach using HOG (Histogram of Gradients) [1] has proven to have good accuracy in detection [2]. FPGAs potentially have better energy efficiency in comparison with alternative platforms such as CPUs and GPUs. In this paper, we design and implement a pedestrian detection system, including a HOG feature extractor and an SVM classifier, on a low-cost FPGA device, targeting at high throughput and low power consumption.

Related Works
HOG Overview
Implementation
HOG Extractor
SVM Classifier
Number Representation
Results
Conclusions

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