Abstract
A positive-feedback (PF) neuron device capable of threshold tuning and simultaneously processing excitatory ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$G^{+}$ </tex-math></inline-formula> ) and inhibitory ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$G^{-}$ </tex-math></inline-formula> ) signals is experimentally demonstrated to replace conventional neuron circuits, for the first time. Thanks to the PF operation, the PF neuron device with steep switching characteristics can implement integrate-and-fire (IF) function of neurons with low-energy consumption. The structure of the PF neuron device efficiently merges a gated PNPN diode and a single MOSFET. Integrate-and-fire (IF) operation with steep subthreshold swing ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SS</i> < 1 mV/dec) is experimentally implemented by carriers accumulated in an <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$n$ </tex-math></inline-formula> floating body of the PF neuron device. The carriers accumulated in the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$n$ </tex-math></inline-formula> floating body are discharged by an inhibitory signal applied to the merged FET. Moreover, the threshold voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{\mathrm {th}}$ </tex-math></inline-formula> ) of the proposed PF neuron is controlled by using a charge storage layer. The low-energy consuming PF neuron circuit (~0.62 pJ/spike) consists of one PF device and only five MOSFETs for the IF and reset operation. In a high-level system simulation, a deep-spiking neural network (D-SNN) based on PF neurons with four hidden layers (1024 neurons in each layer) shows high-accuracy (98.55%) during a MNIST classification task. The PF neuron device provides a viable solution for high-density and low-energy neuromorphic systems.
Highlights
Hardware-based neural networks (HNNs) have emerged for use in neuromorphic systems to compute complex data efficiently [1]–[3]
The G variation of synaptic devices and the Vth variation of neuron circuits can affect the spike rate of target neurons, which can degrade the performance of hardware-based neural networks (HNNs) [25], [26]
It is possible to mimic the homeostasis function of biological neurons, which is essential in spiking neural networks (SNNs) based on spike-timing-dependent-plasticity (STDP) to improve performances [25], [26]
Summary
Hardware-based neural networks (HNNs) have emerged for use in neuromorphic systems to compute complex data efficiently [1]–[3]. For high performance in HNNs, various synaptic arrays and neuron circuits suitable for efficient architectures and learning algorithms have been researched [4]–[8]. Neuron circuits that use large capacitors (≥0.1 pF) and many transistors (≥11 MOSFETs) to process simultaneously signals from these two types of synapses have been reported [11]–[13], resulting in increased power consumption and a larger area. Note that processing these signals simultaneously can reduce memory usage and simplify the peripheral circuitry. Memristor-based neuron devices with two terminals replace membrane capacitors in neuron
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