Low‐Energy Operation Mechanisms for XCT‐SOI CMOS Devices

Abstract

This chapter describes the performance prospects of scaled cross‐current tetrode (XCT) CMOS devices and demonstrates the outstanding low‐energy aspects of sub‐30 nm long gate XCT‐SOI CMOS by analyzing device operations. The energy efficiency improvement of such scaled XCT CMOS circuits (two orders higher) stems from the “source potential floating effect,” which dynamically reduces effective gate capacitance. It is expected that this feature will be very important in many medical implant applications that demand a long device lifetime without recharging the battery.