Low-Cost and Fast Hardware Implementations of Point Multiplication on Binary Edwards Curves

Abstract

This paper presents low-cost and fast hardware implementations of the complete point multiplication on binary Edwards curves over finite fields. The implementations are based on extremely fast complete differential addition and doubling formulas, as the core step in Montgomery scalar multiplication. These complete differential addition formulas are performed for general binary Edwards curves with cost of $5\text{M}+4\text{S}+2\text{D}$ , where, M, S and D denote the costs of a field multiplication, a field squaring and a field multiplication by a constant respectively. The proposed structures are implemented based on three and one pipelined digit-serial Gaussian normal basis multiplier. In the first case, three parallel multipliers are used for computation of point addition and point doubling concurrently. Also in the second implementation for low-cost design with low number of hardware resources these computations are implemented by one multiplier. Implementation results of the proposed architectures based on Virtex-5 XC5VLX110 and Virtex-4 XC4VLX100 FPGAs for two fields $\mathbb{F}_{2^{163}}$ and $\mathbb{F}_{2^{233}}$ are achieved. The results show improvements in terms of execution time, area and performance for the proposed structures compared to previous works.