Abstract
A new low-voltage CMOS winner-take-all (WTA) circuit is presented. The proposed circuit exhibits a linear increase of complexity with the number of inputs at the rate of only three transistors per input and it is based on a modified version of the common source scheme. In this case, each input follower is enhanced by local shunt feedback to increase its gain and to reduce its output impedance. Simulations demonstrate the potential of the circuit to operate at very high speed, with high precision and with a supply voltage close to a transistor's threshold voltage. Experimental verification of the circuit using a 0.5-/spl mu/m CMOS technology is also provided.
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