Low voltage four‐quadrant analog multiplier using dynamic threshold MOS transistors

Abstract

PurposeReal‐time multiplication of two analog signals is one of the most important operations in analogue signal processing. Driven by low‐power and low‐voltage requirements for integrated mixedsignal portable applications, the paper's aim is to propose a novel four‐quadrant low‐voltage analog multiplier using dynamic threshold MOS transistors (DTMOS).Design/methodology/approachThe SPICE simulations were performed with 0.25 μm technology parameters and results verify the performance of the circuit. The multiplier is simulated at low‐supply voltage of ±0.5 V.FindingsThe proposed multiplier has high linearity and simple structure hence it is suitable for high‐performance and low‐power analog VLSI applications.Originality/valueA new low‐voltage four quadrant analog multiplier using DTMOS circuit topology is presented in the paper.