Abstract
Analysis and numerical circuit-design modeling of the speed of current-mode logic devices, as well as complementary push-pull inverters built on scaled 0.2- to 0.1-μm transistor structures with the thin heavily doped base, were performed. The speed was analyzed both on the device and system levels. The objects of investigation were also novel low-voltage push-pull inverters based on 0.1-μm complementary symmetric bipolar–field-effect structures with the undoped (lightly doped) base. These converters offer the following parameters: delay time td = 100–150 ps at P = 5–10 mW and Cl = 100 fF (inverters of type 1) and td = 100–150 ps at P = 30–100 nW and Cl = 1 fF (type 2). It is shown that the high speed of these devices makes them candidates for next-generation ULSI.
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