Abstract

In this paper, novel current-mode analog multiplier circuit based on a pair of voltage-translinear Loop is presented. The proposed circuit is designed in 0.18 µm standard CMOS technology. Simulation result using HSPICE that verify the functionality of circuit with 1 V supply is presented. The circuit can find application in the implementation of wide range of analog systems, Fuzzy and Neural Network circuits.

Highlights

  • Analog circuit design has received wide attention due to the supply voltage scaling down and their potential of lower power consumption [8, 10 from 12] and they are used in the fields of analog signal processing and parallel-computing neural or fuzzy systems

  • In this paper we proposed a new low-voltage divider/multiplier circuit based on the properties of translinear loop which is work in saturation region

  • Several techniques to design CMOS divider/multiplier circuits have been proposed in the literature.The first approach is to use the current-mode square root and squarer circuit based on the square-law characteristics of MOS transistors operated in the saturation region.[3]

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Summary

Introduction

Analog circuit design has received wide attention due to the supply voltage scaling down and their potential of lower power consumption [8, 10 from 12] and they are used in the fields of analog signal processing and parallel-computing neural or fuzzy systems These applications usually require divider/multiplier circuits to cancel non-linearity or to implement modulators or aggregation operators [3,4,5,6]. In its original formulation, the translinear principle provides a simple and efficient way to analyze and synthesize nonlinear circuits based on bipolar junction transistors (BJTs). Due to their exponential characteristics, the translinear principle can be extended to MOS transistors operating in saturation.

Voltage Translinear Loops
The New Low-Voltage Squarer Circuit
Simulation Result
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