Abstract

In this article the current methodologies for low-temperature thin film deposition in microelectronics are reviewed. The paper discusses the high temperature processes in microchip manufacturing and describes the thermal budget fitting issue. The quest for low temperature deposition techniques is motivated in the perspective of contemporary trends in microchip technology such as 3D integration and the ending miniaturization. Reduced temperature depositions tend to deliver lower quality films. This is illustrated with the relation between deposition temperature and thin dielectric film quality (dielectric strength). Existing and emerging technologies for low-temperature thin film deposition are reviewed with an emphasis on their applicability in microelectronic fabrication.

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