Low temperature short channel polycrystalline silicon thin film transistors with high reliability for flat panel display

Abstract

We have investigated a short channel ( L ≤ 1 μm) effect on the electrical reliability of the low temperature poly-Si thin film transistors (TFT) on a glass substrate. The threshold voltage of the p-type poly-Si TFT was observed to be decreased due to the drain induced barrier lowering as the channel length decreased. In the n-type poly-Si TFT with a lightly-doped-drain (LDD), the threshold voltage was slightly decreased when a high drain voltage was applied, while the field effect mobility decreased due to the series resistance of the LDD region in the short channel poly-Si TFT. As the temperature increased, the field effect mobility increased about 80% due to the increase of the thermal activated carrier concentration. We have also investigated the degradation of a short channel poly-Si TFT under hot carrier and self-heating stress. After hot carrier stress ( V GS = 2 V, V DS = 15 V), the field effect mobility was considerably decreased up to 20% due to the trap state generation induced by the hot carrier. The subthreshold slope and threshold voltage were scarcely degraded. After the self-heating stress ( V GS = V DS = 15 V), the subthreshold slope, mobility, and threshold voltage were degraded. Transfer characteristics measured at the high drain voltage ( V DS = 10 V) were shifted to a negative direction because of hole trapping at the backside interface between the polysilicon film and buffer oxide on the glass substrate.