Abstract
In this work, we present a gate-all-around (GAA) low-temperature poly-Si nanowire (NW) junctionless device with TiN/Al2O3 gate stack using an implant-free approach. Since the source/drain and channel regions are sharing one in situ phosphorous-doped poly-Si material, the process flow and cost could be efficiently reduced. Owing to the GAA configuration and small volume of NW channels, the fabricated devices with heavily doped channels display superior switching behaviors and excellent immunity to short-channel effects. Besides, the negative fixed charges in Al2O3 are found to be helpful to obtain desirable positive threshold voltages for the n+-poly-Si channel devices. Thus, the simple and low-cost fabrication method along with excellent device characteristics makes the proposed GAA NW transistor a promising candidate for future 3-D electronics and system-on-panel applications.
Highlights
With the aggressive downscaling of transistor dimensions to increase the speed and density of transistors on an integrated circuit, nanowire (NW) field-effect transistors (FETs) are considered as one of the most promising device architectures to meet the requirements [1,2,3]
Transfer characteristics of the DC and UC NW FETs are depicted in Figure 5, in which another two DC NW devices with larger channel cross sections are compared to illustrate the volume effect on the switching behaviors
More aggravated switching properties are observed for larger NW channels among the three splits of DC devices
Summary
With the aggressive downscaling of transistor dimensions to increase the speed and density of transistors on an integrated circuit, nanowire (NW) field-effect transistors (FETs) are considered as one of the most promising device architectures to meet the requirements [1,2,3]. Owing to the inherent tiny volume of NW, it enables better gate controllability for overcoming the short-channel effects over the planar FETs because the electrostatic potential in the ultrathin channel can be effectively controlled so that the channel suffers less electrical interference from the drain [3,5]. The control on junction doping profiles of source/drain (S/D)-to-channel regions becomes extremely challenging in nanoscale regimes. In a JL structure, the dopant type and concentration are the same all the way from the source, channel to drain
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