Abstract
In this study, an optimization to the Physical Vapour Deposition (PVD) process for low thermal stability temporary bonding adhesives is proposed. Deposition of Cu Seed layer in via trenches were demonstrated on various substrates: Silicon-Silicon bonded, Silicon-Glass bonded and Mould-glass bonded substrates. Surface temperatures recorded on these substrates during processing were far lower than critical temperatures of temporary bonding and de-bonding (TBDB) materials. This paper focuses on innovations of Through Silicon Vias (TSV) applications in 2. 5D/3D Integrated Circuit (IC) packaging for the PVD process. These results would pave the way for the robust integration of a variety of temporary bonded adhesives with low thermal stability with Silicon-via-contacts, at significantly lower temperature ranges.
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