Low-Temperature Fabrication of Si Thin-Film Transistor Microstructures by Soft Lithographic Patterning on Curved and Planar Substrates

Abstract

We demonstrate the use of micrometer-scale polymer molding, a soft-lithographic patterning technique, as a means to fabricate amorphous silicon thin-film transistors (TFTs). Two different TFT architectures were fabricated and testeda common gate, common channel architecture for single-level patterning on a spherically curved glass substrateand an isolated channel, inverted, staggered architecture with multilevel pattern registration on a planar glass substrate. The silicon and silicon nitride films are deposited by reactive magnetron sputtering, allowing all film depositions to be carried out at temperatures at or below 125 °C, and making this fabrication process a candidate for use on plastic or other thermally sensitive substrates. We discuss the performance of polymer molding as a patterning technique for thin-film microstructures on both planar substrates and on substrates with three-dimensional curvature.