Low-Temperature Dip-Based All-Copper Interconnects Formed by Pressure-Assisted Sintering of Copper Nanoparticles

Abstract

Flip-chip interconnects made entirely from copper are promising candidates to overcome the intrinsic limits of solder-based interconnects and match the demand for increased current densities of high-performance microprocessors. To this end, dip-based all-copper interconnects have been demonstrated to be a viable approach to form electrical interconnects by sintering copper nanoparticles between the copper pillar and pad. However, the performance of this technology is limited by residual porosity of the copper joint formed between the pillar and the pad during sintering. Moreover, the applicability of this technology in the printed circuit board industry is constrained by thermomechanical stresses that arise from the sintering. Furthermore, the compatibility of the sintering approach with standard finishing layers used as diffusion-barrier layers to provide wetting and to prevent the oxidation of the pillar and pad surfaces is unknown. In this paper, we pursue the advancement of dip-based all-copper interconnect technology. We demonstrate the robustness of dip-transfer of copper paste for varying withdrawal velocities and typical nonuniformities in copper pillar heights. Moreover, we prove the applicability of this technology with fine pillar diameters and pitches down to 10 and $20~\mu \text{m}$ , respectively. In addition, we demonstrate reduced porosities of the copper joints by applying pressure during the bonding process at 200 °C. This densification leads to interconnects with four times the shear strength and half the electrical resistance compared to interconnects formed without the application of pressure. In addition, the bonding temperature is decreased to 160 °C by applying a novel copper paste formulation, reducing the thermomechanical stress in the assembly caused by the cooling from the sintering temperature. Finally, the compatibility of this technology with EPAG, ENIG, and ENEPIG finishing layers is demonstrated, with resulting shear strength of the interconnects above 70 MPa and electrical resistance comparable to the unfinished samples.