Low temperature CMUT fabrication process with dielectric lift-off membrane support for improved reliability

Abstract

This paper reports an improved CMOS compatible low temperature sacrificial layer fabrication process for capacitive micromachined ultrasonic transducers (CMUTs). The process adds the fabrication step of silicon oxide evaporation which is followed by a lift-off step to define the membrane support area without a need for an extra mask. This simple addition improves reliability by reducing the electric field between the top and bottom electrodes everywhere except the moving membrane without affecting the vacuum gap thickness. Furthermore, the parasitic capacitance which degrades the CMUT receive performance is reduced. A 1D CMUT array suitable for intracardiac echocardiography (ICE) imaging with 9 MHz center frequency is fabricated using this method. Detailed electrical and acoustic testing indicates adequate performance of the devices for ICE in agreement with simulations. Long term output pressure testing with more than 2 × 1011 pulsing cycles and environmental testing demonstrate the efficacy of the approach for improved reliability as compared to devices without the additional membrane support layer.