Abstract

ABSTRACTProposed herein is a new technique of activation for the backplane of low-temperature amorphous indium gallium zinc oxide thin-film transistors (a-IGZO TFTs) by applying a bias voltage to gate, source, and drain electrodes and simultaneously annealing them at 150°C. This ‘voltage bias activation’ can be an effective method of reducing the backplane processing temperature from 300°C to 150°C. Compared with the reference a-IGZO TFTs fabricated at 300°C, the a-IGZO TFTs fabricated through voltage bias activation showed sufficient switching characteristics: 10.39 cm2/Vs field effect mobility, 0.41 V/decade subthreshold swing, and 3.65 × 107 on/off ratio. These results were analyzed thermodynamically using infrared micro-thermography. In the case of the positive gate voltage bias condition, the maximum temperature of the a-IGZO channel increased to 48°C, and this additional annealing effect and activation energy lowering compensated for the insufficient thermal energy of annealing at a low temperature (150°C). With this approach, a-IGZO TFTs were successfully fabricated at a low temperature.

Highlights

  • Amorphous indium gallium zinc oxide thin-film transistors (a-IGZO TFTs) have gained international attention for the backplane technologies of the next-generation flexible displays since Hosono et al first published a paper about ‘In-Ga-Zn-O TFTs’ in 2004 [1]. This is because a-IGZO TFTs are promising alternatives to the hydrogenated amorphous silicon (a-Si:H) TFTs due to their many advantages, such as a lower deposition temperature and higher field effect mobility compared to those of the a-Si TFTs [2,3,4]

  • The a-IGZO TFTs fabricated by the sputtering process, have an issue: defect sites can be generated in oxide films by high-energy target ions and the incorporation of Ar + ions during the sputtering process [5,6,7,8]

  • The electrical characteristics of the devices were measured in a dark box under ambient conditions, using a semiconductor parameter analyzer (HP 4156C; Hewlett Packard, Palo Alto, CA). a-IGZO TFT measurements were carried out by inducing a gate voltage (VGS) sweep from −30 to +30 V and a drain voltage (VDS) of 10.1 V

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Summary

Introduction

Amorphous indium gallium zinc oxide thin-film transistors (a-IGZO TFTs) have gained international attention for the backplane technologies of the next-generation flexible displays since Hosono et al first published a paper about ‘In-Ga-Zn-O TFTs’ in 2004 [1]. This is because a-IGZO TFTs are promising alternatives to the hydrogenated amorphous silicon (a-Si:H) TFTs due to their many advantages, such as a lower deposition temperature and higher field effect mobility compared to those of the a-Si TFTs [2,3,4]. The mechanisms of voltage bias activation are discussed based on the thermodynamic analysis of the a-IGZO TFTs using infrared microthermography

Experiments
Electrical measurements
Results and discussion
Conclusion
Notes on contributors
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