Abstract
The Complementary Metal-Oxide Semiconductor(CMOS) technology image sensor contemplate rather than Charge Coupled Device (CCD), owing to low noise, dark current, miniaturization, decline production cost, chip area susceptibility, and also the picture quality. Particularly in the visual prosthesis implantable devices, the signal process begins from capturing the image through the sensor. In this paper, a 180nm CMOS Image sensor (CIS) <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$128(\mathrm{H})^{\ast}128(\mathrm{V})$</tex> pixel array designed with the proposed pixel leaf cell using photodiode can operates in three modes. The new leaf cell designed by photodiode specification reduces dark current and improves Full-Well Capacity (FWC) & Fill Factor (obtained by having 20.5pF diode capacitance) is perfectly measured. Further by adopting the Correlated Double Sampling (CDS) technique in the column readout circuitry reduces the temporal noise in image sensor with evidence of better closed-loop gain & linearity. The leaf cell layout generation characterizes the CIS parametric analysis.
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