Abstract
In this paper, we present design and FPGA implementation of a low power fractional bit encoded (FBE)–spatial modulation (SM) based transmitter for the multiple-input multiple output (MIMO) systems. This Modulation scheme includes the data dependency check before the spatial multiplexing. The proposed data dependency check allows efficient selection of antennas for parallel transmission of data. The Fractional bit encoding is modulus conversion scheme which convert the incoming bit stream to numbers in an arithmetic base, or modulus, that is not a power of 2 .When applied to SM, FBE results in a more versatile system design allowing transmitter to be equipped with an arbitrary number of antennas for a wider range of spectral efficiencies given restrictions on space and power consumption. The synthesis results of the implementation of transmitter on FPGA are included in the paper.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
