Abstract
Low power photomultiplier base circuits, using high voltage FETs in the voltage divider, are described. Two examples of design are presented. One consists of P channel FETs for all stages of dynode and features extremely low stationary current(20 μA). The other consists of N channel FETs for the last 3 or 4 dynodes and the stationary current is about 130 μA. They ensure good linearity at high counting rates(up to the average anode current of 100 μA).
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