Abstract

This paper deals with the performance analysis of low power (LP) Low noise amplifier (LNA) for Ultra wide band (UWB) applications. The proposed inductorless LNA has two stages, one is complementary common gate (CCG) stage and the other one is body biased common source stage (BBCS). In CCG stage current reused techniques is used to reduce the power consumption and to provide broad band impedance matching in UWB band. Apart from this, CCG stage is also used to reduce the noise of BBCS stage using noise cancellation technique. BBCS stage is used to provide high and flat gain. Biasing voltage is optimized through body voltage. The proposed LNA was successfully simulated in 45-nm CMOS technology. All the simulations have been done for a range of frequency 3GHz to 8GHz in cadence virtuoso. The proposed LNA achieved a peak power gain (S21) of 17.1dB and −16.4dB S11, at frequency 4.1GHz. The bandwidth of proposed LNA is 3.7GHz −5.5 GHz, −9.9dBm IIP3with minimum NF is 1.1dB. The proposed LNA consumes a power of 3.6mW with supply voltage 1V.

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