Low-Power, High-Density Spintronic Programmable Logic With Voltage-Gated Spin Hall Effect in Magnetic Tunnel Junctions

Abstract

A non-volatile spintronic programmable logic (SPL), based on a 3-teriminal magnetic tunnel junction (MTJ), is presented and simulated using a compact device model. The SPL structure is compatible with CMOS technology and can be fabricated in the back end of line (BEOL). The proposed SPL exploits gate-voltage-modulated spin Hall effect (V-SHE) switching, which combines the voltage-controlled magnetic anisotropy (VCMA) effect and SHE, as a parallel configuration method. The VCMA modulates the coercivity of the MTJ, reducing the critical current for the SHE to change the state of the MTJs. This allows the SPL to achieve 100 times faster configuration speed due to the parallel configuration, and 32% area reduction because of minimized transistors in the write circuit, compared to programmable logic based on conventional spin-transfer torque memory (STT-RAM).