Abstract

Residue number systems (RNSs) are the main choice in many comparison- and division-free applications (e.g., digital signal processing). However, the development of efficient RNS comparators can widen the spectrum of RNS applications. Such comparators can replace the straightforward, but slow and costly, practice of converting the comparison operands to binary, as inputs to a wide word binary comparator. This has motivated some researchers to design shortcut RNS comparison methods that obviate the need for full reverse conversions. However, the few actual realizations that we have encountered are based on moduli set $\tau =\{{2}^{n}-1,{2}^{n},{2}^{n}+{1}\}$ . In this paper, after brief review and performance evaluation of the previous methods, we present a new ${\tau }$ -comparator with considerably reduced cost and power dissipation, with no delay penalty. The underlying comparison algorithm is based on ordering the dynamic range into consecutive partitions, and locating the partitions that own the corresponding comparison operands. The required circuitry includes two ${n}$ -bit adders, which are replaced by one compound parallel prefix architecture, in order to save area and power. Postlayout performance evaluations, of the proposed work and the best previous one, show small latency improvement, 17%(46%) reduction in area consumption, 30%(41%) in power dissipation, and 31%(47%) in power-delay product, for ${n=8(22)}$ .

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