Low-Power CMOS Interface for Recording and Processing Very Low Amplitude Signals

Abstract

In this paper, we describe a low-power low-voltage CMOS very low signal acquisition analog front-end of sensor electronic interfaces. These interfaces are mainly dedicated to biomedical implantable devices. In this work, we focus on the implantable bladder controller. Since the nerve signal has very low amplitude and low frequency, it is, at first fed to a low-voltage chopper amplifier to reduce the flicker (1/f) noise and then amplified with a programmable gain high CMRR instrumentation amplifier. This is followed by an analog signal processing circuit to rectify and bin-integrate (RBI) the amplified signal. The resulting RBI is then converted to digital and transferred to the implant's central processor where information about bladder can be extracted. The numerous analog modules of the system have been implemented in CMOS 0.35 μm, 3.3 V technology. The design, simulation and measurement results of the proposed interface are presented. At supply voltage of 2.2 V the power dissipation is less than 1.4 mW, the input equivalent noise is 56 nV/\sqrt{\rm Hz} and the error in RBI calculation is less than 0.15%.