Abstract

Gate Diffusion Input (GDI) is a technique for designing low power circuits. This technique allows usage of less number of transistors as compared to CMOS logic. The basic GDI cell consists of only two transistors which are used to implement the basic logic functions. Because of less number of transistors, the switching is reduced and hence there will be a less power, delay and also reduced area. Complex functions can also be implemented using this technique. In this paper basic GDI cell is modified to get a “good” logic 0 and it is compared with the CMOS logic. The low power full adder is designed using GDI technique and is modified to get the strong logic zero. Using this modified GDI full adder, 4 bit Ripple Carry Adder and 4*4 Array Multiplier are designed and simulated. The simulation is done using CADENCE VIRTUOSO based on 45nm technology with the supply voltage of 1.2V.

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