Abstract
A low power and low area charge pump design is presented in this manuscript. Proposed charge pump design reduces the glitch by employing the small valued resistances. Usage of less number of transistors makes this design entitle for low area requirements. The design uses 0.18um CMOS process, its power supply is 1.8V and simulated using Cadence's Spectre. Simulation results show that the design consumes power of 168 uW at a frequency of 4 GHz.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.