Low-Power Approximate Arithmetic Circuits for IoT Devices

Abstract

Aim: The aim of the study was to implement low-power approximate arithmetic circuits for IoT devices. Background: Information transmitted via electronic media is exposed to security threats. With the advancement of internet technology, the devices linked to the internet are growing, leading to the Internet of Things (IoT). Objective: IoT and big data are the prominent computing paradigms that employ approximate computing. It takes the benefit of various applications' error-tolerable features to lower the amount of resources necessary to deliver a specific degree of computation quality. An IoT device has to receive and transmit a lot of data. If this data size can be reduced by approximate computing, then a lot of power can be saved, which provides the dual benefit of data protection and power consumption. Methods: The approximated adder and multiplier using AIF is proposed that helps in the reduction of power consumption and security threats that occur in IoT devices. Result: The proposed approximated adder and multiplier consumes 2.81% to 32.95% less power as compared to conventional technique. Conclusion: For the protection of data communication in IoT devices from security threats, approximate arithmetic circuits play a fundamental role. To attain this issue, in this paper, authors have proposed approximate adder and multiplier using AIF, which also provides reduction in power consumption. The proposed circuits can be used as a basic block for security purposes in IoT devices. In future, approximation algorithms will be implemented for mitigation of security threats.